Mar 10, 2007

常用IC习语缩写


DUT    Design Under Test
BIST   Build In Self Test
SOP    Standard of Process
TB      Test Bench
RTL    Register Transfer Level
LEC    Logic Equivalence Checking
ENV   Envirament
ECO   Engineer Change Order
PCI    Periphral Component Interconnect
STA   Static Timing Analysis
ASIC  Application Specific Integerated Circuit
DFT    Desing For Testability
SRV    Simulation Result Verification
TSTL  Toshiba Stardard Tester Interface
ATE    Automatic Test Equipment

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